Altera collaborates with ARM for FPGA SoC toolkit integration
Altera has begun shipping sample quantities of their 28nm Cyclone V SoCs, with the first product being the integration of a dual core ARM Cortex A9 and the 110 KLE FPGA fabric, the largest device in the family. Chris Balough, Senior Director of Product Marketing for SoC FPGA Products at Altera, says that the devices offer an attractive value proposition for reducing cost and board space for designers, but they also could present new challenges for software-hardware debugging.
To address this problem, Altera has partnered with ARM to produce the first vendor-specific version of the ARM DS-5 debugger, which they have combined with Altera’s Quartus II SignalTap embedded logic analyzer. By combining the two tools, designers can perform synchronized cross-triggering between the processor and FPGA, setting software breakpoints that trigger a trace in the logic hardware analyzer, or reverse the process to have a logic trigger create a software breakpoint. Software developers gain a view of the register maps for the memory-mapped peripherals in the FPGA fabric, which automatically update whenever designers re-configure the hardware.
Balough describes the DS-5 Altera Edition as a FPGA-adaptive debugger, enabling FPGA SoCs to appear the same to software developers as a fully hardened SoC. In order to create the hooks between the processor system and the programmable fabric, Altera integrated ARM’s CoreSight debug and trace IP into the FPGA.
Javier Orensanz, Director of Product Management in the System Design Division at ARM, says that the two companies worked together to reduce their separate JTAG probes to a single low-cost cost connector, which interfaces DS-5 with Altera’s USB-Blaster. Designers can identify CPU-FPGA performance bottlenecks by using ARM’s DS-5 Streamline performance analyzer feature, which enables enable system-level statistical analysis of software activity and bus traffic with performance counters from the SoC and FPGA. Orensanz says that the DS-5 Altera Edition will enable simultaneous debug and trace for Cortex-A9 cores and other CoreSight-compliant soft cores that users may synthesize on the FPGA.
Altera has also entered into an OEM agreement with ARM, so that they will offer the toolkit directly to their customers at a reduced price. Balough adds that the agreement gives Altera a period of exclusivity on the FPGA-related features that have been added to DS-5. The Altera SoC Embedded Design Suite (Altera SoC EDS) will be available in “early 2013″, for $995. Altera also plans to have a Cyclone V SoC Hardware Development Kit to be available in April 2013 for $1,495.
As regards integration with OpenCL for heterogeneous multi-core design, Balough says that the DS-5 Altera Edition is currently C-language based, but over time could be extended as the new language achieves greater adoption for embedded design.