Achronix begins shipping first 22nm FinFET FPGAs

Achronix HD1000 FPGA

Achronix, a startup in Santa Clara, CA that is  building “application targeted” FPGAs, has announced that it has begun shipping  their first product – the Speedster®22i HD1000.  The company is collaborating with Intel, who is manufacturing the Achronix FPGAs in their 22nm, 3-D Tri-Gate (I.e. FinFET) transistor technology, and also has contributed design IP for the Speedster products.

Robert Blake, Achnronix President and CEO, says that the company is targeting applications in telecommunications, networking, high-performance computing, video transport, test & measurement, and security & encryption that require high-performance and very high bandwidth. The Speedster FPGAs integrate hardened IP blocks that provide the critical functions required to address these targeted applications. Pre-built interface IP in the HD1000 includes 10/40/100G Ethernet, 100Gbps Interlaken, PCI Express Gen1/2/3 and a 2.133 Gbps DDR3 controllers. Intel provides the design for high-speed GPIO & SerDes, PLLs, and embedded memory blocks.

The Speedster22i HD1000 contains more than 6 billion transistors, says Blake, providing more than 1 million effective Look-Up Tables (LUTs).  The fixed-function hardened IP accounts for the equivalent of approximately 300K LUTs in Achronix’s calulation, leaving a total of 700K programmable LUTs in the HD1000.  The device also integrates 86 Mbits of RAM, 960 programmable IO and 64 lanes of 12.75 Gbps SerDes.  To compete with the established FPGA market leaders, Blake says it is critical for Achronix to offer devices with half the cost and power, and requiring half the design time of alternative solutions.

The Intel 22nm Tri-Gate process offers Achronix advantages in static and dynamic power and density over competitors, who just began shipping their largest FPGAs in 28nm foundry processes last year. For U.S. military and aerospace applications, the “built in the USA” aspect of Achronix’s business model also offers a potential advantage in device qualification.  Besides wafer fabrication and probe test at Intel’s facilities in Oregon, Intel also provides assembly and package test in their Arizona manufacturing plant. Intel provides advanced packaging technology for the HD1000, a 1mm BGA package that is larger than competitors at 52.5mm square, with 2600 balls (versus 1900).

Achronix claims a 50% reduction in FPGA design time due to the hardened IP that they provide, which eliminates the need for achieving timing closure and functional verification were those functions implemented in the programmable fabric. The company supplies Synopsys Synplify Pro as the synthesis front-end, to accompany their Achronix CAD environment (ACE) tool set.  ACE runs on an Eclipse platform, for Windows or Linux workstations.

Achronix is maknig a Speedster22i HD1000 development board available for purchase separately, at a price of $13,000. The development kit is a PCI-express form-factor card, which includes the ACE software, a programming pod and power supply.  Designers can use the kit to develop and prototype applications with the 100G Ethernet, Interlaken, PCI Express, DDR3 and SerDes functions in the HD1000.  Achronix will also supply a number of reference designs for evaluation of the hardened IP interface protocols.