SoC
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Xeon-D and 3U VPX combine for cognitive EW
The role of FPGAs in cognitive EW
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FMCs provide versatility and modularity across multiple platforms
The VITA 57 specification defining the FPGA Mezzanine Card (FMC) has been adopted since 2008. Today FMCs are commonly used in architectures from VPX to CompactPCI to MicroTCA and more. The versatility of the mezzanine approach allows a broad swath of acceptance in various applications.
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Market conditions swing in favor of the custom SoC
The system-on-chip (SoC) is now a part of almost all electronic systems. As an integrated circuit (IC) that pulls together microprocessor cores, systems logic, and I/O functions, the SoC enables a wide range of product designs and is driving new markets such as the Internet of Things (IoT) and the cyber-physical systems that now underpin many industrial and automotive applications.
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DSP capabilities of SoC FPGAs address emerging small cell requirements
The insatiable demand for increased communication bandwidth is driving the development of new wireless architectures and the deployment of a wide variety of new wireless infrastructure devices. Of the two key approaches – a centralized homogeneou...
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Functional and performance verification of SoC interconnects
Verifying interconnect Intellectual Property (IP) – the "glue" that holds together the cores and IP blocks in a System-on-Chip (SoC) – has become more complicated with advanced SoCs, which require special interconnect IP to perform the on-chip communication function. As a result, functional and performance verification of these SoC interconnects has taken on a new level of complexity. Tools have been developed to simplify verification while providing design engineers the ability to find and fix interconnect problems much earlier in the design cycle.
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Managing SoC complexity with scenario model verification
Graph-based scenario models assist engineers with project management, thorough verification, and other aspects of complex SoC development.
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EDA and the cloud
The effect of the cloud can be seen everywhere, in just about every industry. I had the opportunity to talk with Larry Drenan, Services Group Director with Cadence Design Systems, about the current state of EDA as well as trends and thoughts on EDA relative to the cloud.
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Reducing bugs in hardware design with EDA and formal verification technology
Complex SoCs are often behind schedule or require re-spins due to bugs not caught by verification. In order to meet hardware design challenges, and improve quality and efficiency, designers can integrate formal verification technology into the design c...
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Embedded signal processing enables advanced radars and EW systems with low latency
Modern radar and electronic warfare designs rely heavily on embedded computing systems that leverage high-speed commercial processors and FPGAs to find every target or signal and enable the warfighter to respond in real time. Meanwhile, signal processing system designers are cutting costs by using parallel compute platforms such as OpenCL that work across multiple chip platforms.
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Integrating High-Level Synthesis designs into FPGA SoCs with less effort and risk
As FPGA SoCs grow in popularity, High-Level Synthesis (HLS) tools are becoming a popular tool for hardware development, though to take advantage of their benefits designers must overcome their challenges.
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Platforms continuum for system realization
Open, connected, and scalable hardware/software platforms should connect design and verification flows to offer higher performance and a more flexible modeling environment.
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Squeezing the last penny of efficiency from embedded designs
Embedded SoC designers must look for innovative solutions to reduce die size while remaining on mainstream process technologies.
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Cell phones: The next great software driver
Operating system companies targeting cell phones and mobile internet devices provide software that'll drive the greater embedded market.
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Selecting the right peripheral for DSP applications
Embedded systems interact with the environment and other components within a larger system. Much of the bottleneck in meeting real-time demands comes from delays in getting data in and out of the system, rather than processor speed or software implementation. Knowing how to select the right mix of peripherals for embedded applications and how to utilize these peripherals to optimize system performance can alleviate this bottleneck.
John McHale, Editorial Director
