ARM + DSP makes an optimized SoC
The use of ARM CPUs is growing in Systems-on-Chip (SoC) platforms, as the generic ARM architecture lends well to a wide variety of systems and applications. However, while ARM processors are ideally suited for system management functions, they typically struggle with processing-intensive tasks such as imaging and advanced audio and voice communications. As the need for advanced signal processing continues to increase, application-specific Digital Signal Processors (DSPs) are now being integrated with ARM cores on the die of SoCs to offload demanding data processing from the CPU in order to optimize power consumption and performance.
"ARM CPUs are widely used today in a variety of applications, such as mobile computing, home entertainment, wireless communications, and network infrastructure," says Eyal Bergman, VP of Product Marketing, CEVA. "However, the ARM cores cannot handle demanding data processing tasks in a power efficient manner. For that purpose, the ARM cores are augmented with dedicated engines such as advanced vector DSPs to offload the ARM from tasks such as Layer 1 (L1) data processing in cellular communications, and multimedia processing in mobile computing devices. The application-specific DSP is typically integrated alongside an ARM processor, providing 10x more horsepower to deal with [the] latest communication and multimedia requirements while significantly reducing power consumption."
The ARM and DSP combination on SoCs also helps with scalability in addition to performance optimization.
"It is a universally accepted fact that one Instruction Set Architecture (ISA) will not be able to optimally satisfy increases in data processing and changes in scalability requirements," says Sanjay Bhal, Focused End Equipment Manager, HPC and Cloud, Texas Instruments. "With the integration of ARM and DSP in the SoC, customers can now take advantage of the best single threaded performance of an ARM core to run control code while using a DSP core for processing-intensive applications."
Heterogeneous combination challenges
Although heterogeneous processor architectures provide significant benefits in terms of performance and efficiency, integrating ARM cores and DSPs on the same die presents a number of challenges. Developers must now align these heterogeneous architectures with dedicated hardware acceleration blocks and system peripherals, which creates integration and management problems, Bergman says.
"ARM offers industry-standard interconnect IPs [through the] Advanced Microcontroller Bus Architecture (AMBA) protocol to allow multiple heterogeneous cores to be applied on SoC devices in a transparent manner," he says. "In addition, different system IPs are required, such as L1, L2, and L3 caches with full cache coherency, data traffic management IPs, hardware acceleration IPs, and more.
"As an ARM partner, CEVA supports ARM's latest interconnect technologies with its range of DSPs to enable joint CEVA and ARM customers to integrate ARM CPUs with CEVA DSPs seamlessly. In addition, CEVA also offers many proprietary system IPs, such as Direct Memory Access (DMA) and data traffic management using advanced queues and buffers."
The complex hardware of multicore SoCs also leads to software complexity. To simplify software development on these complex SoCs, programmers need to abstract the different cores and hardware blocks and need to have drivers and APIs to control the blocks, Bhal says.
"Multicore SoC complexity directly translates to software complexity, and while multicore software architecture partitioning, task scheduling, dispatching, and coordination among cores add another layer of programming challenges, they do not have to be overwhelming," says Bhal. "Figuring out how to accelerate multicore software development and still deliver a robust and top-quality system solution are the utmost concerns for multicore developers. Our KeyStone multicore SoCs offload many software functions into hardware AccelerationPacs or other architectural elements in order to reduce the amount of software needed, and to automate many of the more complex multicore management tasks."
Application-specific SoCs and the future
SoCs with integrated application-specific processors are a forward-looking trend as the demands for higher-performance data processing grow. SoCs optimized to deal with the unique requirements of communication, imaging and vision, audio, and voice market segments will provide strong areas of growth for heterogeneous architectures that include DSPs and superscalar ARM cores.
"With the growing desire by cellular subscribers to be 'always on' and the increasing availability of higher bandwidth, we see a constantly growing need for higher performance with more advanced communication technologies such as LTE-Advanced and Wi-Fi 802.11ac; improved imaging and scene analysis such as in Natural User Interface (NUI), higher resolution video, and Advanced Driver Assistance Systems (ADAS); and advanced audio and voice applications such as voice triggering and activation, and HD audio processing for home and automotive," Bergman says. "This trend heavily promotes the need for application-specific processors that can efficiently offload the main system CPU with dedicated optimized support for data processing in the application domain."