The insatiable demand for increased communication bandwidth is driving the development of new wireless architectures and the deployment of a wide variety of new wireless infrastructure devices. Of the two key approaches – a centralized homogeneous network architecture and a distributed heterogeneous network architecture of small cells – the small cell approach has much more stringent constraints on power, cost, and footprint. These constraints are driving the use of efficient DSP implementations with some implementations using both a DSP processor and a companion SoC FPGA.
DSP capabilities of SoC FPGAs address emerging small cell requirements
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