New products show the benefits of standards for FPGA system interfaces
Over the last few years, the FPGA industry has introduced several standards that define electromechanical interfaces between FPGA-based motherboards and add-on daughter cards, often referred to as mezzanine cards. These standards facilitate interoperability, flexibility, and reuse, enabling host systems to be easily adapted for new applications and interface protocols without the expense of a new FPGA board design. Some of the standards place a greater emphasis on performance, while others focus on simplicity and cost.
Xilinx had an active role in defining the FPGA Mezzanine Card (FMC) standard, now ANSI/VITA 57.1, which supports signal transmission of up to 10 Gbps with adaptively equalized I/O and single-ended or differential signaling of up to 2 Gbps. Altera developed their own High Speed Mezzanine Card (HSMC) specification, based on Samtec connectors, which defines eight classes of signals for “multi-gigahertz” differential signaling. Digilent, who manufactures a variety of educational electronic design tools, addresses the other end of the spectrum with the Pmod interface for low frequency, low I/O pin count peripheral modules.
Manufacturers of FPGA add-on products have announced a number of new products in recent weeks, which demonstrate the rich diversity of applications that these interface standards have enabled.
Texas Instruments and Altera collaborate on RF development kit
Texas Instruments (TI) has developed a set of five add-on cards for the Altera Arria V FPGA Development Board (Figure 1), which enables users to assemble a complete RF prototyping system for applications such as wireless base stations, remote radio heads, and military radio and intelligence equipment. The Altera board includes two Arria V 5AGXB3 FPGAs, one for implementation of RF receiver functions and the second for transmitter and Digital Pre-Distortion (DPD) functions. Altera includes two HSMC expansion slots and one FMC slot, along with 2 GB of SDRAM memory, 4.5 MB of QDR II SRAM, and 512 MB of flash memory onboard. A DisplayPort and pair of Small Form Factor Pluggable (SFP+) connectors are also provided.
To implement the RX signal chain, TI developed an HSMC-ADC bridge card, which connects from the Arria V board to the TSW1265EVM. The TSW1265EVM is a wideband dual receiver reference design and evaluation platform, which includes TI’s ADS4249 14-bit 250 MSps ADC, LMK04800 dual-PLL clock jitter cleaner and generator, and the LMH6521 dual-channel Digital Variable Gain Amplifier (DVGA).
For the TX and feedback signal chains, TI developed a second bridging card that connects to the HSMC Port B and FMC port on the Altera board. Users can then plug in the TSW30H84EVM, which includes a DAC34H84 Digital-to-Analog Converter (DAC), and two TRF3705 RF modulators with a 300 MHz to 4 GHz output range for up-converting I/Q outputs from the 4-channel DAC to RF carriers. The DAC34H84 is a 16-bit, 1.25 GSps DAC with a maximum 625 MSps/DAC input pattern rate. To complete the feedback chain, TI provides the TSW1266EVM DPD feedback reference design, which converts RF signals to digital bit streams with a dual-channel down converter mixer, the LMH6521 DVGA, and TI’s ADCs. TI also provides a stand-alone local oscillator source, the TSW3065EVM, with frequency ranges from 300 MHz to 4.8 GHz.
Users of the RF development kit can employ Altera's RF toolkit to apply algorithms developed in MATLAB directly to the FPGA hardware. Altera's Advanced DSP Builder and Qsys software convert MATLAB code into RTL for download with a test bench into the FPGA. Test vectors are executed by the FPGA and converted to RF signals by the TI TX DAC, where they can be monitored on test equipment and fed back to the RX ADCs. Digital representations of waveforms can be uploaded back to MATLAB for spectral analysis to observe the impact of algorithm changes in real time. The Arria V FPGA RF Development Kit is available for order now from Arrow Electronics for $6,299.
High-bandwidth digital connectivity
Xilinx has combined their KC705 baseboard with a 10 GbE FMC daughter card from Faster Technology to develop the 20 Gbps Kintex-7 FPGA Connectivity Kit (Figure 2). The Xilinx-targeted reference design baseboard is a PCI Express (PCIe) card that includes the 326,080 logic cell XC7K325T FPGA. The kit utilizes the Kintex-7 12.5 Gbps GTX transceivers and PCIe x8 Gen2 hard block.
Xilinx includes the HDL for the reference design with the complete software stack, including a DMA IP core from Northwest Logic, dual 10GBASE-R PHY interface, a 64-bit, 1,600 Mbps DDR3 memory controller, and support for the AMBA Advanced eXtensible Interface 4 (AXI 4) standard. The Faster Technology FMC supports up to four 10 Gbps SFP+ interfaces, two of which Xilinx is using in their design kit. The Connectivity Kit ships with a control and monitor GUI built on the Fedora 16 Live OS, along with all of the required software drivers and source code on a DVD. Xilinx also includes their full ISE Design Suite Embedded Edition, device-locked for the Kintex-7 325T FPGA. The Xilinx Kintex-7 FPGA Connectivity Kit is available for order from the company’s website for $2,895.
Peripheral modules (Pmods)
The Peripheral Module (Pmod) standard was developed by Digilent and has been adopted by Xilinx and Avnet. Pmods are typically supplied on a PCB that is just 0.8" wide, containing just one Integrated Circuit (IC). However, Dave Sackett, Manager of Field Applications at Maxim Integrated Products, says that Digilent’s spec does not preclude building a more elaborate subsystem that can be connected with a Pmod extension cable.
Maxim has introduced a family of 15 Pmods (Figure 3), providing users with the ability to easily add analog/mixed-signal functions such as precision clock oscillators, ADCs, DACs, and digital thermometers to FPGA prototyping boards. Some of the boards that support Pmod include the Digilent Nexsys-3 and Avnet LX9 MicroBoard for the Xilinx Spartan-6 FPGA, and the Avnet ZedBoard, which features the Xilinx Zynq-7000 FPGA SoC with dual embedded ARM Cortex-A9 cores. The Avnet ZedBoard for Zynq provides five Pmod ports, while the Digilent Nexsys has four ports and the Avnet LX9 has two.
Digilent designed the Pmod connector with a single row or two rows of six pins, using standard 100 mm spaced, 25 mm square pin header style connectors. One pair of pins in each row is dedicated for power and ground, leaving four (or eight) pins for I/O signals. In their specification, Digilent says that Pmod is not intended for high-frequency operation, but by using RJ45 connectors and twisted pair Ethernet cable, signals have been sent reliably at 24 MHz and distances of up to 4 meters.
Digilent has described a standard set of Pmod pin assignments for various I/O applications, including I2C, SPI, GPIO, UART, and H-Bridge. To enable rapid prototyping without requiring users to write any HDL code, Maxim provides a bit stream package for FPGA configuration with their Pmods, which includes all of the necessary FPGA I/O configurations. Each available Pmod port on the FPGA is assigned one instance each of a SPI, I2C, GPIO, and UART interfaces. By including a Multiplexer (MUX) in their configuration, Maxim has provided the ability for users to easily swap out Pmods with only a firmware change; the FPGA configuration does not need to be changed at all.
In the Avnet LX9 and Digilent Nexys board, Maxim utilizes embedded uBlaze processors in the Spartan-6 FPGAs, while Zedboard utilizes the ARM Cortex-A9 processors in Zynq. Maxim provides example driver programs for the Pmods, which users can cut and paste to incorporate into their own applications. Maxim refers to their set of 15 Pmods as the “Analog Essentials” collection, including functions for data conversion, a digital potentiometer, real-time clock, light sensor, clock oscillator, thermal interface, communication transceivers, digital isolation, GPIO expansion, LED interface, and relay drivers. The entire set is available for $89.95, or individually for $19.95 each.
New standards gaining ground
It seems fitting that Merriam-Webster lists more than nine definitions (with variants) for the word standard. In the FPGA ecosystem, like most other technologies, there is never just one standard that suits everyone. The key for a standard with any value is to gain the endorsement of enough companies to establish critical mass. The FMC, HSMC, and Pmod interfaces have each drawn the interest of a growing number of semiconductor companies and board manufacturers. The options provide engineers with a great deal of choice for the development of FPGA systems in terms of size, performance, cost, and functionality.