Articles
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U.S. Army's VICTORY ushers in the next COTS integration revolution
The U.S. Army's VICTORY architecture leverages COTS to combat SWaP, costs, and share data in real time.
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Managing the military component obsolescence paradox: When new performance levels are needed after EOL
Many military programs are considering staying with legacy buses like CompactPCI and VME to manage shrinking budgets. Keeping design options open is a good way to boost the performance of EOL components.
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EDA vendors roll out advances for 20 nm design
After nearly 50 years of shrinking designs in two dimensions, extending Moore's Law to 20 nm design technology requires the use of a new technique: Double Patterning Technology (DPT). EDA vendors will see a major impact as a result, and semiconductor foundry Taiwan Semiconductor Manufacturing Corporation Limited (TSMC) recognized EDA competitors for their collaborative contributions to 20 nm design flows.
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Embedded lockdown: Designing secure devices
The impetuous move into a world of connected devices has rendered security an imperative consideration at every phase of the embedded design process. Warren comments on this and introduces the rest of the November 2012 issue of Embedded Computing Design.
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Big 3 Executive Interview - Walden C. Rhines, CEO, Mentor Graphics
In this "Big 3 Executive Interview," Walden Rhines, CEO of Mentor Graphics, foresees a world in which EDA innovations are based on more than lithographic shrinks.
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Evolution and innovation in the EDA ecosystem
Editorial Director Mike Demler introduces EDA Digest, as well as the central "innovation" theme of its inaugural issue.
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Big 3 Executive Interview - John Chilton, Senior VP, Marketing and Strategic Development, Synopsys, Inc.
In an exclusive executive interview with EDA Digest, John Chilton of Synopsys shares his company's perspective on the transition from 2D to 3D ICs, among other things.
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Big 3 Executive Interview - Lip-Bu Tan, CEO, Cadence Design Systems
In the Cadence Design Systems third of EDA Digest's Big 3 Executive Interviews, CEO Lip-Bu Tan identifies abstraction, automation, and reuse as key elements of an EDA innovation.
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2012 Top Innovators in EDA: Serial innovation, collaboration, and patience
Serial innovation, collaboration, and patience are the themes from the 2012 Top Innovators in EDA: Dr. Chi-Ping Hsu, Dr. John Sanguinetti, and the Mentor Graphics Calibre Development Team.
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Innovation is alive and well in EDA!
Kathryn Kranen, Chairman of the EDA Consortium, highlights the three types of innovation that have historically piloted Electronic Design Automation.
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FPGAs compete with ASSPs for wireless backhaul applications
FPGAs' flexibility and configurability make them competitive the wireless infrastructure market as mobile backhaul ramps up to free up wireless spectrum for the growing population of data-hungry mobile devices.
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Adding intellect to intelligent systems
Warren reflects on IP cores, memory, and the food for thought they offer developers of intelligent systems.
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VITA 65, serial fabrics, and HPEC: Decisions, decisions
Organizations going the VITA 65/OpenVPX route as part of a planned HPEC deployment have an important decision to make in terms of choice of serial switched fabrics. The decision is based, however, not only on technical specifications and performance, but on other factors as well – factors that are potentially more critical.
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Understanding analog IP cores for embedded computing needs
The analog IP core selection roadmap leads to strategic objectives and significant value.
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Designing for the future of FPGAs beyond Moore's Law
A rapid development pace for FPGA innovation might spell a fast approach to the end of Moore's Law, but FPGA users will continue to see performance and functionality increases.
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Model-Based Design assists DSP designers with FPGA integration
Model-Based Design enables engineers to quickly implement and verify their algorithms on FPGAs in a workflow that can be used by engineers with or without FPGA design experience. This method also allows for easier refinements for shorter design iterations and higher levels of abstraction to facilitate the next generation of embedded FPGA devices.
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FPGAs and DSP are hot topics at the Hot Chips Conference
The upcoming high-performance microprocessor and IC show is holding events that are "must-see"s for FPGA and DSP designers, including sessions on OpenCL, 3D IC technology, another round of ASICs vs FPGAs, embedded vision, and DSP's role in the future of wireless networking.
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Moving into embedded supercomputing
As certain applications continue to drive the processors on a board to the "nth" power, developers should prepare for n-dimensional architectures.
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FPGA migration strategies: IP development tools ease Xilinx Virtex-6 to Virtex-7 migration challenges
Migrating to a new FPGA platform is not for the faint of heart, but the challenges can be eased, thanks to modern IP development tools.
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New products show the benefits of standards for FPGA system interfaces
After the recent introduction of several new standards for interfaces between FPGA-based motherboards and add-on daughter cards to the FPGA industry, FPGA add-on product manufacturers have contributed new products that demonstrate the diversity of applications the new standards have enabled.