Virtual or real: Prototyping platform(s) for ARM-based FPGA design

One of the hottest developments in the FPGA industry over the last year has been the pair of announcements by (first) Xilinx and (later) Altera that they are developing integrations of dual-core ARM Cortex-A9 processor systems with programmable logic fabrics for their 28 nm product lines (See Editor’s Choice on page 13). While FPGAs are often used to augment the performance of separate standalone processors, with the new highly integrated SoC FPGAs, manufacturers are adopting a different processor-centric approach in their integrated circuit architectures as they seek to extend their reach into the adjacent but distinct world of embedded software engineering. In order to do so, the manufacturers and their customers will need to adopt new hardware-software prototyping solutions that EDA vendors initially developed for the SoC industry, including the use of virtual platforms.

Choosing an approach

Companies that are considering use of an SoC FPGA need to be aware that different prototyping solutions address different parts of the challenge of hardware-software co-design. Discussions with the FPGA vendors and their EDA partners at the recently completed ARM TechCon made it clear that, just like for Application Specific Integrated Circuits (ASICs) and Application-Specific Standard Products (ASSPs), there is no one-size-fits-all solution that covers everyone’s needs.

The hardware method

Xilinx approached the problem of launching a new platform by starting with the Ishikawa method, which is well known in quality circles, drawing a fishbone causal diagram that described all the components that would make up a design methodology for the Zynq-7000. Engineers at the company concluded that they needed to understand the Zynq use model from three different customer perspectives: software developers, hardware developers, and system architects. With feedback from early access customers, they were able to define each set of requirements that would be necessary to take a design from initial architectural specification to a completed, code-ready design.

The first prototyping platform that Xilinx developed is the Zynq-7000 emulation board, a complete hardware model built using five FPGAs to emulate the ARM processing system, with a sixth FPGA to represent the Zynq programmable fabric (Figure 1). With the emulation board, early access customers have been able to verify complete application use cases, including a Computed Axial Tomography (CAT) Scanner and a Linux Web server.

Figure 1: The Xilinx Zynq-7000 Emulation Board models the complete ARM processor system and FPGA fabric to enable pre-silicon application development.

The software method

Altera took a different approach in their first pre-silicon prototyping platform for the Cyclone V and Arria V SoC FPGAs, focusing first on the needs of software developers to port an operating system to any new processor platform. Unlike the Zynq emulation board, the Altera Virtual Target includes no hardware at all, and is made up of a fast, completely software-based simulation model that designers can run on their own PCs (Figure 2). The Virtual Target, which Altera developed with Synopsys employing the EDA provider’s Virtual Prototyping Solution, comes with a prebuilt open source Linux kernel and also supports the Wind River VxWorks Real-Time Operating System (RTOS).

Figure 2: Altera’s Virtual Target combines a software simulation model of the ARM processor system and peripherals with an FPGA in-the-loop development board for hardware-software modeling of the SoC FPGAs.

As a software model, besides simulation speed the Altera Virtual Target offers the advantage of lower cost than a hardware emulation board, which makes it easier to support multiple engineers on an SoC FPGA development project. Users need to be aware, however, that the Virtual Target only models the ARM-based processor system and its peripherals, and has no view of the FPGA programmable fabric. In a demonstration at ARM TechCon, Altera engineers explained that the Virtual Target allows users to simulate board-level components such as the DDR SDRAM, flash memory, and I/O devices, but does not contain models for ARM AXI interfaces – the bidirectional data paths that will facilitate high-speed communications between the processor system and FPGA fabric in the SoC FPGAs.

Integrating the FPGA fabric

In order to extend the Virtual Target prototype from the processor system to the FPGA fabric, designers will need to employ an optional FPGA-in-the-loop extension that will be available in early 2012. The extension will consist of an Altera FPGA development board that users can connect to the PC-based Virtual Target through a PCIe interface. Together, the Virtual Target and the FPGA-in-the-loop extension will enable users to model custom peripherals and hardware accelerators in the FPGA fabric, create device drivers, and complete integration with application software prior to final hardware availability.

At ARM TechCon, Xilinx announced that they too have adopted the virtual platform approach for the Zynq-7000. Like Altera’s Virtual Target, the Xilinx Virtual Platform will provide developers with a fast simulation model for the ARM Cortex-A9 MPCore processor, with support for the NEON media processing engine and floating point support. Xilinx worked with Cadence Design Systems to apply the EDA vendor’s Virtual System Platform technology to Zynq.

The Software Developer version of the Zynq Virtual Platform is similar to the Altera Virtual Target in that it models just the processor-memory system, graphics, and I/O, but not the FPGA fabric. To extend the Virtual Platform the two companies took a different approach with the System Creator package, which enables users to stay with a software simulation model for devices to be built in the Zynq-7000 device’s programmable logic, and does not require an FPGA in-the-loop. Rather than employing hardware, users of the Zynq Virtual Platform can employ Transaction-Level Models (TLMs) written in System-C, System Verilog, or VHDL models, which can be simulated in Cadence’s Incisive simulator.

Getting a head start

The new SoC FPGAs will offer users an architecture that differs from past approaches to embedding processor cores in programmable logic devices with complete dual-core ARM Cortex-A9 systems that will boot up just like a standalone processor. These devices have been pre-announced by the FPGA vendors many months before silicon will become available. Fortunately, the manufacturers have recognized that software development takes an increasing proportion of embedded system design, and engineers can make good use of that lead time by starting now with fast simulation models in virtual platforms, combined with real hardware models built on FPGA development boards.

Mike Demler, Editorial Director