Lauro Rizzatti, EVE-USA
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Using emulation to verify today's complex designs
Increasing time-to-market pressures, along with escalating hardware/software integration and quality concerns imposed on engineering teams, make the verification process a strategically important step in chip design. A new generation of cost-effective emulators such as EVE’s ZeBu-Server (for Zero Bugs) capable of handling up to 1 billion or more ASIC gates at high speeds reaching several megahertz provides a great choice for large designs.
