Mike Demler, Editorial Director, OpenSystems Media
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More litigation plagues the EDA industry
Add Cadence and Berkeley Design Automation (BDA) to the list of EDA litigants that will be making more lawyers wealthy in Silicon Valley. First, Synopsys filed suit against Mentor Graphics in September last year, in an attempt to clear their path to an acquisition of Emulation and Verification Engineering (EVE), producer of the ZeBu ASIC [...]
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Advances in EDA design methodologies led by next-generation FPGAs
As FPGA vendors strive to make their devices more SoC- and ASIC-like, they are collaborating with EDA companies to more seamlessly integrate their tools. This produces great benefits for designers as FPGA design methodologies are leading the way to new capabilities in areas such as Electronic System Level (ESL) synthesis, IP integration and re-use, and higher-level tools for software/hardware co-design.
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Looking back at the milestones as DAC-50 approaches
As we approach the 50th Design Automation Conference, it's time to look back on the milestones of innovation that have happened in the EDA industry during the past five decades. Editorial Director Mike Demler lists his first five picks for the most influential developments to the EDA industry.
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Cadence Design Systems to acquire DSP IP provider Tensilica
Cadence Design Systems announced today that they intend to acquire Tensilica, a provider of Silicon Intellectual Property (SIP) for Digital Signal Processing (DSP) applications, for approximately $380M. The announcement follows Cadence’s February 7, 2013 announcement that they would acquire Cosmic Circuits, a design house based in India, which provides SIP for analog and mixed-signal applications, [...]
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Achronix begins shipping first 22nm FinFET FPGAs
Achronix, a startup in Santa Clara, CA that is building “application targeted” FPGAs, has announced that it has begun shipping their first product – the Speedster®22i HD1000. The company is collaborating with Intel, who is manufacturing the Achronix FPGAs in their 22nm, 3-D Tri-Gate (I.e. FinFET) transistor technology, and also has contributed design IP for the Speedster [...]
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DSP and programmable device needs increase with expanding reach of consumer electronics
The International Consumer Electronics Show (CES) has expanded into an embedded electronics show in recent years with its increasing focus on electronics outside of the consumer gadget and appliance spaces. CES's showcase of electronics depends on wireless connectivity and extensive data processing, which will require more use of DSP and FPGAs.
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Altera collaborates with ARM for FPGA SoC toolkit integration
Altera has begun shipping sample quantities of their 28nm Cyclone V SoCs, with the first product being the integration of a dual core ARM Cortex A9 and the 110 KLE FPGA fabric, the largest device in the family. Chris Balough, Senior Director of Product Marketing for SoC FPGA Products at Altera, says that the devices offer an [...]
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Top DSP-FPGA advances in 2012
As 2012 comes to an end, we look back on the DSP and FPGA advances we think are the biggest of the year and will continue to influence in 2013: 20 nm, 3D ICs, and FPGA SoCs.
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Tektronix Certus 2.0 eases debug of ASIC FPGA prototypes
Tektronix, Inc., has introduced version 2.0 of its Certus ASIC prototyping debug solution, building on capability the company acquired with their purchase of Veridae Systems in July, 2011. Certus integrates directly with RTL design flows, so that verification engineers can more easily incorporate embedded instruments to increase their visibility of ASIC prototype behavior. Brad Quinton, Chief [...]
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EDA vendors roll out advances for 20 nm design
After nearly 50 years of shrinking designs in two dimensions, extending Moore's Law to 20 nm design technology requires the use of a new technique: Double Patterning Technology (DPT). EDA vendors will see a major impact as a result, and semiconductor foundry Taiwan Semiconductor Manufacturing Corporation Limited (TSMC) recognized EDA competitors for their collaborative contributions to 20 nm design flows.
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Big 3 Executive Interview - Walden C. Rhines, CEO, Mentor Graphics
In this "Big 3 Executive Interview," Walden Rhines, CEO of Mentor Graphics, foresees a world in which EDA innovations are based on more than lithographic shrinks.
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2012 Top Innovators in EDA: Serial innovation, collaboration, and patience
Serial innovation, collaboration, and patience are the themes from the 2012 Top Innovators in EDA: Dr. Chi-Ping Hsu, Dr. John Sanguinetti, and the Mentor Graphics Calibre Development Team.
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Big 3 Executive Interview - Lip-Bu Tan, CEO, Cadence Design Systems
In the Cadence Design Systems third of EDA Digest's Big 3 Executive Interviews, CEO Lip-Bu Tan identifies abstraction, automation, and reuse as key elements of an EDA innovation.
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Big 3 Executive Interview - John Chilton, Senior VP, Marketing and Strategic Development, Synopsys, Inc.
In an exclusive executive interview with EDA Digest, John Chilton of Synopsys shares his company's perspective on the transition from 2D to 3D ICs, among other things.
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Evolution and innovation in the EDA ecosystem
Editorial Director Mike Demler introduces EDA Digest, as well as the central "innovation" theme of its inaugural issue.
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FPGAs compete with ASSPs for wireless backhaul applications
FPGAs' flexibility and configurability make them competitive the wireless infrastructure market as mobile backhaul ramps up to free up wireless spectrum for the growing population of data-hungry mobile devices.
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Microsemi announces SmartFusion2 FPGA SoCs
Microsemi has announced the next-generation of their FPGA SoCs, the SmartFusion2 family, which combine a flash-based FPGA fabric with a 166 MHz ARM Cortex-M3 processor on a single chip. The SmartFusion2 will be available in configurations from 5K 4-input Look-Up Tables (LUT) to 120K LUT. The Microprocessor Sub-System (MSS) in the SmartFusion2 consists of a 166 MHz ARM Cortex-M3 [...]
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Designing for the future of FPGAs beyond Moore's Law
A rapid development pace for FPGA innovation might spell a fast approach to the end of Moore's Law, but FPGA users will continue to see performance and functionality increases.
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FPGAs and DSP are hot topics at the Hot Chips Conference
The upcoming high-performance microprocessor and IC show is holding events that are "must-see"s for FPGA and DSP designers, including sessions on OpenCL, 3D IC technology, another round of ASICs vs FPGAs, embedded vision, and DSP's role in the future of wireless networking.
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New products show the benefits of standards for FPGA system interfaces
After the recent introduction of several new standards for interfaces between FPGA-based motherboards and add-on daughter cards to the FPGA industry, FPGA add-on product manufacturers have contributed new products that demonstrate the diversity of applications the new standards have enabled.
