Thomas Neu, Texas Instruments
The JESD204B high-speed data converter I/O standard provides for serial interface bit rates of up to 12.5 Gbps. Many system designers are embracing this “upgrade” to the digital interface. Its faster serial interface allows them to use fewer high-speed serial transceivers on their FPGA or ASIC. This reduction in the number of I/O traces enables smaller packages, smaller PCBs, and smaller overall product form factors. However, designing a reliable physical interconnect for data rates exceeding 5 Gbps may involve additional effort. As the speed increases, the transmission distance needs to be accounted for and additional channel modeling may be necessary, possibly involving a 3D field solver to ensure signal integrity.