Monique DeVoe, Managing Editor
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First hardened floating-point DSP blocks in FPGAs increase flexibility, power, and performance
Altera has announced that its Arria 10 and Stratix 10 FPGAs and SoCs are the first IEEE 754-complaint devices with hardened floating-point DSP blocks. The Arria 10 family with hardened floating-point capabilities is available now, with the Stratix 10 family to follow in 2015, along with software tools to assist migration from previous-generation Arria and [...]
