TEWS TECHNOLOGIES introduces PMC Module with High-Density User-Programmable FPGA

TEWS TECHNOLOGIES announced today the TPMC632, a PMC module providing a user configurable XC6SLX45T-2 or XC6SLX100T-2 Spartan-6 FPGA. Designed for industrial, COTS, and transportation applications, where specialized I/O or long-term availability is required, the TPMC632 provides a number of advantages including a customizable interface for unique customer applications and a FPGA-based design for long-term product lifecycle management.

TEWS TECHNOLOGIES announced today the TPMC632, a PMC module providing a user configurable XC6SLX45T-2 or XC6SLX100T-2 Spartan-6 FPGA. Designed for industrial, COTS, and transportation applications, where specialized I/O or long-term availability is required, the TPMC632 provides a number of advantages including a customizable interface for unique customer applications and a FPGA-based design for long-term product lifecycle management.

Three different module versions are available. The TPMC632-10 provides 64 ESD-protected TTL lines and the TPMC632-11 offers 32 differential I/O lines using EIA 422 / EIA 485 compatible, ESD-protected line transceivers. The TPMC632-12 provides a mix of 32 TTL and 16 differential I/O lines.

All lines are individually programmable as input, output or tri-state. The receivers are always enabled, which allows determining the state of each I/O line at any time. This can be used as a read-back function for lines configured as outputs. Each TTL I/O line has a pull-up resistor. The pull-up voltage is selectable to be either +3.3V or +5V. The differential I/O lines are terminated by 120 ohms resistors.

The integrated Spartan-6’s PCIe Endpoint Block is connected to a PCIe-to-PCI Bridge which is routed to the PMC PCI Interface. The FPGA is connected to a 128 Mbytes, 16 bit wide DDR3 SDRAM. The SDRAM interface uses a hardwired internal Memory Controller Block of the Spartan-6.

The FPGA is configured by a platform flash or SPI flash. Both configuration flashes are in-system programmable. An in-circuit debugging option is available via a JTAG header for readback and real-time debugging of the FPGA design (using Xilinx "ChipScope").

User applications can be developed using the design software ISE WebPACK which can be downloaded free of charge from www.xilinx.com. The larger FPGA densities require a full licensed ISE Design Suite.

Physical connection is either through front panel I/O with a HD68 SCSI-3 type connector or rear I/O via P14.

Extensive software support for major operating systems such as Windows, Linux, LynxOS, Integrity, VxWorks, and QNX is available.

About TEWS TECHNOLOGIES

TEWS TECHNOLOGIES is a leading solutions provider of embedded I/O and CPU products based on open architecture standards such as PMC, XMC, IndustryPack® (IP), CompactPCI, standard PCI, PCIe, AMC, FMC, and VME. TEWS has more than 30 years of experience designing and building turn-key embedded interface solutions using the philosophy to listen and respond to our customers’ needs. Using this ‘customer first’ approach, TEWS has developed a large number of standard and custom products for industrial control, telecommunication infrastructure, medical equipment, traffic control and COTS applications. TEWS’ line of embedded I/O solutions is available worldwide through a global network of distributors. For more information, go to www.tews.com.